The present invention relates to a structure of a liquid crystal display device integral with peripheral circuits in which an active matrix display circuit and peripheral driving circuits are provided on the same substrate.
More particularly, the present invention relates to a configuration in which peripheral driving circuits are provided inside a region enclosed by a sealant for sealing a liquid crystal material.
There are configurations of liquid crystal display devices integral with peripheral circuits having an active matrix circuit and peripheral driving circuits provided on the same substrate in which peripheral driving circuits are provided inside a region enclosed by a sealant for sealing the liquid crystal material. A CPU, a memory, a control circuit and the like may be provided in addition to peripheral driving circuits.
In such a device, lines are provided under the region where the sealant is provided (hereinafter referred to as xe2x80x9csealant regionxe2x80x9d). For example, such lines include external connection lines for transmitting signals between the outside and inside of the sealant and short rings formed by extending scanning lines and signal lines and shorting them outside the sealant region in order to prevent electrostatic breakdown of TFTs (thin film transistors) forming an active matrix display circuit at manufacturing steps.
The lines provided under the sealant region results in different heights in the sealant. Such a height difference is primarily caused by two reasons.
One reason is that the lines under the sealant region are localized and are not present in some locations.
The other reason is that the line width and line intervals of the lines under the sealant region vary.
FIG. 13 shows an example of a liquid crystal display device integral with peripheral driving circuits. Referring to FIG. 13, a substrate 1501 and a counter substrate 1502 are disposed in a face-to-face relationship with a sealant 1505 having an injection hole 1510 interposed therebetween to form a panel. On the substrate 1501, there is provided an active matrix display circuit 1503, peripheral driving circuits 1504 such as shift registers and decoders for driving the circuit 1503 and external connection lines 1508 for electrically connecting those circuits and circuits outside the sealant to transmit signals therebetween.
The external connection lines 1508 are connected to the external circuits through an FPC (flexible printed circuit).
There is further provided short rings 1509 which are formed by extending scanning lines and signal lines. The short rings 1509 are formed to short those lines with each other outside the sealant region to prevent electrostatic breakdown of TFTs (thin film transistors) forming the active matrix display circuit at manufacturing steps. The configuration of the short rings 1509 shown in FIG. 13 is a configuration for multi-shot manufacture in which a plurality of panels are obtained from a single substrate. Although not shown in FIG. 13, the short rings are electrically connected to the short rings of an adjacent panel to short the scanning lines and signal lines, and the short rings are separated when the substrate is separated into independent panels as shown in FIG. 13.
FIG. 14A shows sections of a region under the sealant 1505 where the external connection lines 1508 are provided and a region where no line is provided. Referring to FIG. 14A, provided on the substrate 1501 are an underlying film 1511 such as a silicon oxide film, a first inter-layer film 1512 formed by a silicon oxide film, a silicon nitride film or a multi-layer film consisting of them, external connection lines 1508 and a resin inter-layer film 1513 made of resin such as polyimide or acrylic.
The external connection lines 1508 are formed by a metal film, e.g., an aluminum film, in the range from about 200 nm to 700 nm. Although dependent on the, application, the external connection lines 1508 are formed by a plurality of lines each having a width in the range from 50 xcexcm to 300 xcexcm provided as a group at intervals in the range from 30 xcexcm to 100 xcexcm.
In such a configuration, the resin inter-layer film 1513 has a thickness of about 1 xcexcm and is provided in order to achieve flatness. However, regions of the resin inter-layer film 1513 over the external connection lines 1508 are higher than regions having no line by a height difference d. Such a step can be in the range from a few hundred nm to 500 nm, although it is smaller than the height (thickness) of the external connection lines 1508.
FIG. 14B shows a sectional view of a region under the sealant 1505 where the short rings 1509 are provided in the same layer and using the same material as those of the external connection lines 1508. Therefore, the thickness (height) of the short rings 1509 is the same as that of the external connection lines 1508. The short rings are extensions of signal lines and scanning lines. They are a plurality of lines each having a width in the range from 2 xcexcm to 10 xcexcm provided as a group at intervals in the range from 20 xcexcm to 100 xcexcm.
There is a height difference d2 between the region where the short rings 1509 are provided and the region where the external connection lines 1508 are provided. This height difference can be also in an approximate range from a few hundred nm to 500 nm. Especially, the height difference is increased when a plurality of the resin inter-layer films are formed. A step on the order of 1000 nm may be formed when the films are stacked to a thickness on the order of 2 xcexcm.
A step can be formed on the resin inter-layer film also between the region having the short rings 1509 and the region having no line.
The substrate having the active matrix display circuit provided thereon and the counter circuit are provided in a face-to-face relationship with a sealant including spacers (spherical or cylindrical microscopic particles for maintaining an interval between the substrates) interposed therebetween. Therefore, any uneven height difference in the sealant region where the sealant is provided causes distortion of the counter substrate such as flexing and twisting to make the substrate interval uneven. As a result, a uniform state of display can not be achieved in a single screen and there will be unevenness in color and brightness.
The problem of the distortion of the substrate does not occur even in the presence of a height difference under the sealant region if the height difference is uniformly distributed under the sealant region. However, since the lines extending across the sealant region are provided as a group of lines which are locally concentrated, in general, such a height difference is not uniformly distributed under the sealant region. This results in distortion of the substrate as described above.
The allowance (the range in which no uneven display occurs) for the height difference under the sealant region is on the order of only 1000 nm for a TN (twisted nematic) type liquid crystal display. Especially, for an ECB (electrically controlled multi-reflectivity) mode utilizing nematic liquid crystal, a height difference of only 200 nm causes distortion of the substrate which leads to uneven display and color variation. For example, a height difference of 200 nm between the external connection lines and the short rings makes the substrate interval in the vicinity of the short rings smaller than that in the vicinity of the external connection lines, thereby causing distortion of the substrate and uneven display. Therefore, it is quite important for a liquid crystal display device to have a small height difference under the sealant region in order to provide uniform display in one screen.
It is an object of the present invention to reduce a height difference under a sealant region where wiring is provided under the sealant region (sealant).
Especially, it is an object of the present invention to reduce a height difference under a sealant region in a configuration wherein wiring is provided under the sealant region and one or more inter-layer films made of a resin material are provided on the wiring.
It is another object of the present invention to reduce a height difference under the sealant region in a configuration wherein lines having different widths are provided under the sealant region and wherein one or more inter-layer films made of a resin material are provided above those lines.
According to the present invention, a liquid crystal display device comprises:
a first substrate having a active matrix circuit and peripheral driving circuits provided thereon;
a counter substrate having a counter electrode provided in a face-to-face relationship with the substrate;
a sealant provided between the first substrate and the counter substrate such that it surrounds the active matrix circuit and peripheral driving circuits;
a liquid crystal material provided inside the sealant;
a plurality of external connection lines provided on the first substrate under the sealant with a resin inter-layer film interposed therebetween for electrically connecting the active matrix display circuit and peripheral driving circuits to circuits present outside the sealant; and
an adjustment layer provided in the same layer as the plurality of external connection lines.
In the above-described configuration, the adjustment layer may be provided with the same thickness as that of the plurality of external connection lines.
In either of the above-described configurations, the adjustment layer may be provided with the same intervals and width as those of the plurality of external connection lines.
In any of the above-described configurations, at least one of the plurality of external connection lines may be electrically connected in parallel to one of a plurality of auxiliary lines provided in a layer different from that of the external connection lines to reduce electrical resistance, and an adjustment layer may be provided in the same layer as the auxiliary lines.
A plurality of lines extending across the sealant thereunder and having a smaller width than that of each of the plurality of external connection lines and intervals greater than the width may be provided in a layer different from that of the plurality of external connection lines, and the plurality of lines may include extensions from scanning lines and signal lines that form the active matrix display circuit.
Further, a plurality of lines extending across the sealant thereunder and having a smaller width than that of each of the plurality of external connection lines and intervals greater than the width may be provided in the same layer as that of the plurality of external connection lines, and the plurality of lines may include extensions from scanning lines and signal lines that form the active matrix display circuit. The plurality of lines may include a portion under the sealant where the width is increased.
In the configuration in which at least one of the plurality of external connection lines is electrically connected in parallel to one of a plurality of auxiliary lines provided in a layer different from that of the plurality of external connection lines to reduce electrical resistance and in which an adjustment layer is provided in the same layer as the auxiliary lines:
a plurality of first lines having a width smaller than that of each of the plurality of auxiliary lines may be provided at intervals greater than the width in the same layer as the auxiliary lines such that they extend across the sealant thereunder;
the plurality of first lines may include extensions of either the scanning lines or signal lines forming the active matrix display circuit;
the plurality of first lines have a portion under the sealant where the width thereof is increased;
a plurality of second lines having a width smaller than that of each of the plurality of auxiliary lines may be provided at intervals greater than the width in the same layer as the auxiliary lines such that they extend across the sealant thereunder;
the plurality of second lines may include extensions of the other of group of lines, i.e., the scanning lines or signal lines forming the active matrix display circuit; and
the plurality of second lines have a portion under the sealant where the width thereof is increased.
In the above-described configuration, the extensions of either the scanning lines or signal lines forming the active matrix circuit may be provided in a face-to-face relationship with the adjustment layer provided in a layer different from that of either the scanning lines or signal lines.
Further, the adjustment layer may have a region under the sealant in a face-to-face relationship with the extension of either the scanning lines or signal lines, which is electrically separated from adjacent regions.
Furthermore, the adjustment layer may be electrically divided into a plurality of segments in the region in a face-to-face relationship with the extensions of either the scanning lines or signal lines.
The extensions of the other group of lines, i.e., either the scanning lines or signal lines forming the active matrix display circuit may be provided in a face-to-face relationship with an adjustment layer provided in a layer different from that of the other group of lines, i.e., the scanning lines or signal lines.
In addition, the adjustment layer may have a region facing the extension of either the scanning lines or signal lines, which is electrically separated from adjacent regions.
Moreover, the adjustment layer may be electrically divided into a plurality of segments in the region facing the extensions of either the scanning lines or signal lines.
According to the principle of the present invention, regions under a sealant are adjusted to a height similar to that of the highest region under the sealant.